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Byte Format and Acknowledge Bit

Every byte, sent over the I2C bus, is eight bits long. Data is transferred with the Most Significant Bit (MSB) first. An Acknowledge bit must follow each byte. The master generates all clock pulses, including the acknowledge clock pulse.

The Acknowledge bit allows:

  • The receiver to signal the transmitter that the byte was successfully received and another byte may be sent;

  • The receiver to signal the transmitter that it received enough data and the transmission should be terminated;

  • The slave to signal the master that the specified slave address is present on the bus and transmission can start (see Slave Address and Data Direction);

  • The slave to delay the transmission, while it prepares for another byte of data (see Clock Stretching for details).

After transmission of the last eighth bit of data, the transmitter releases the SCL line (during the low phase of clock). This gives an opportunity to receiver to acknowledge (or not acknowledge) the data.

If the receiver pulls the line LOW during the HIGH period of the ninth clock pulse, it acknowledges the byte (the Acknowledge (ACK) signal).

Acknowledge ACK signal

The Not Acknowledge (NACK) signal is defined when SDA remains HIGH during this clock pulse. The master then can generate either a STOP (P) condition to abort the transmission, or a repeated START (Sr) condition to start a new transmission.

Not Acknowledge NACK signal

The following conditions can lead to the Not Acknowledged (NACK) signal:

  1. There is no device to acknowledge the slave address – no slave with the specified address is connected to the I2C bus.

  2. The slave is unable to receive or transmit – it is busy performing another function.

  3. The slave does not support the specified data direction (read or write).

  4. The receiver gets data that it does not understand.

  5. The receiver cannot receive any more data bytes.

  6. A master-receiver must signal the end of the transmission to the slave-transmitter.

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